In this video from ITFreeTraining, I will look at DDR memory or Double Data Rate memory. DDR memory doubles the speed of data transfer from the previous memory type. DDR keeps being improved and is still the number one memory type sold on the market.

Download PDF handout https://itfreetraining.com/handouts/a...

Double Data Rate
0:16 Double Data Rate memory is different from previous memory modules in that it sends data on the rise and fall of the timing signal. The timing signal is generated by the memory controller and is sent to the memory module to control when commands and data are sent or received. As you can see, at the high and low point of the timing signal, data is sent. Before this, data was sent once for a full rise and fall of the timing signal. Essentially this method allows twice as much data to be sent and thus the name, Double Data Rate.

Double data rate has the obvious advantage that you are transferring more data per cycle. You could also increase the speed of the timing signal, for example by doubling the signal speed to get the same result. The problem with this approach is, as the timing signal gets faster, it is harder to control and it is subject to interference. For this reason, in the case of memory, you get a better result by increasing the data rate rather than the speed of the timing signal.

DDR1
1:19 The first standard of DDR otherwise was known as DDR1. DDR1 is not listed as a current exam objective, but I think it is good to look at it to give us an understanding of how far we have come.

DDR1 was released in 2000. There was other memory on the market that gave good performance, but DDR1 became the market leader due to its cheap price and good performance.

There are different versions of DDR1 you will find they generally will operate in the 2.5 to 2.6 voltage range. Higher voltage means higher power consumption, but more importantly more heat. As components get smaller, the heat needs to be reduced, otherwise the components will fail.

The clock rate of DDR1 is between 100 and 200Mhz. This is the speed the memory controller communicates with the memory modules. Remember that DDR transfers twice as much data per clock cycle. For this reason, you will see different methods used to measure the speed of the memory other than the clock rate. More on that later in the video.

DDR1 has 184 pins. It requires a lot of pins as data is transferred in parallel. A lot of components in computers have converted to serial for communications. Memory Modules have not. Later in the video we will look at some of the reasons why this has not occurred.

DDR1 has a 2bit prefetch. Prefetch is how much data, internally, the memory module can transfer to its buffers at once. The more data the memory module can put into its memory buffer, the faster it can transfer data to the memory controller.

The n in the measurement is the data width. Data width is essentially how much data can be transferred out of a single chip at once. The number is how much data the chip will get, at once, internally.

In the case of this chip, 2n means it can internally transfer twice 2 bits internally at once. To understand how this works, consider it like you are in a super market checkout. You realize you need some additional items so you go back into the store and get them. You have two hands so you can get two things. The checkout can only scan one item at a time, but the time taken to do this is small compared to how long it took to get the items.

So, in this example, the chip brings in two bits of data for every one bit of data it transfers out of the chip. Let’s have a closer look at how having a bigger prefetch has on internal memory speed.

Prefetch
3:52 To understand how prefetch works, let’s have a look at how it works in a memory module. In a memory module, consider you have DRAM chips. Usually eight on each side for a total of 16. When accessing data from the DRAM chips, it is stored in a buffer.

Once in this buffer, the data is transferred to the memory controller. If you consider our shopping market example, the buffer is like the conveyor belt leading to the cash register. If you can keep it full, you can maximum how many items go through the cash register. The higher the prefetch, the more fully you can keep the buffer. If the buffer runs out, no items are being transferred.

Description too long for YouTube. Please see the following link for the rest of the description http://itfreetraining.com/ap/3a40

References
https://www.hardwaresecrets.com/every... “Everything You Need To Know About DDR, DDR2 and DDR3 Memories”

Credits
Trainer: Austin Mason http://ITFreeTraining.com
Voice Talent: HP Lewis http://hplewis.com
Quality Assurance: Brett Batson http://www.pbbproofreading.uk